Chapter 2 · CPU Internals

Knowledge Check

9 min read

Try to answer before you open the answers. Guessing is fine; checking your guess is how you learn.

Quick Review (5 minutes)

  1. What are the five stages of the instruction cycle?
  2. What is the difference between a core and a thread?
  3. Why does a CPU need multiple levels of cache (L1, L2, L3) instead of going straight to RAM?
  4. What does Hyper-Threading/SMT actually do? Does it double performance?
  5. What is the difference between Ring 0 and Ring 3?
  6. What is a system call, and why does it exist?
  7. What is the difference between a hardware interrupt and a software interrupt?
  8. What is out-of-order execution?
  9. What does TDP actually measure?
  10. What is thermal throttling, and why does it happen?

ANSWER KEY — DO NOT READ UNTIL YOU'VE ANSWERED

Click to reveal answers

1. The five stages of the instruction cycle

Fetch (get the instruction from memory) → Decode (work out what it means) → Execute (do the operation, usually in the ALU) → Memory (read or write memory if needed) → Writeback (store the result, usually in a register).

2. Core vs. thread

Core: A complete, physically separate processing unit. It can run its own fetch-decode-execute loop.
Thread: In the hardware sense, one stream of instructions a core can run. A core with SMT/Hyper-Threading can run 2 threads by slipping them into idle gaps. In the software sense (Chapter 10), a thread is one independent sequence of instructions inside a process that the OS schedules onto a core.

3. Why multiple cache levels?

Because there is a huge speed gap between the CPU core and RAM (roughly 0.25 ns vs. 60–100+ ns). Caches form a ladder of bigger-but-slower memory (L1 → L2 → L3 → RAM). Data you use often or recently is usually found close to the CPU (this is called locality of reference), so you do not pay RAM's full delay on every access.

4. Hyper-Threading/SMT

It lets one physical core look like two logical processors to the OS, by filling idle gaps in the core with a second instruction stream. It does not double performance. The two threads share the same execution units, so a realistic gain is roughly 15–30%, not 100%.

5. Ring 0 vs. Ring 3

Ring 0 (kernel mode): The Windows kernel and drivers run here. Full access to hardware, all memory, and privileged CPU instructions.
Ring 3 (user mode): Apps run here. They cannot touch hardware directly, cannot read other processes' memory, and cannot run privileged instructions. They must go through the kernel using system calls.

6. System calls

A system call is the controlled, well-defined way for user-mode (Ring 3) code to ask the kernel (Ring 0) for a privileged job, such as opening a file or getting memory. It exists because user mode is powerless on purpose. The system call is the only legitimate doorway between the two levels, and the kernel checks every request that comes through it.

7. Hardware interrupt vs. software interrupt

Hardware interrupt: Sent by a physical device (keyboard, network card, disk) to tell the CPU something happened, so the CPU does not have to keep polling.
Software interrupt: Deliberately triggered by running code (for example a SYSCALL instruction) instead of by a device. It is the mechanism behind system calls.

8. Out-of-order execution

A technique where the CPU may run instructions in a different order than the program lists them. It runs whichever ready instruction is available next, instead of strictly waiting for program order, as long as the final results are the same as running them in order. A reorder buffer remembers the original order so results are still committed correctly.

9. TDP (Thermal Design Power)

A figure from the manufacturer, in watts, that says roughly how much heat a cooling system must be able to remove for the CPU to run as intended. It is a cooling guideline, not a hard power limit. Many CPUs can legitimately draw more than their rated TDP during short boosts.

10. Thermal throttling

A safety feature where the CPU automatically lowers its own clock speed once it passes a temperature limit, to avoid damage. It is deliberate behaviour, not a fault. But constant throttling under normal work usually signals a real cooling problem (dust, dried-out thermal paste, a cooler that is too small).

UNDERSTANDING QUESTIONS

These need longer answers.

1. Explain Why Pipelining, Out-of-Order Execution, and Speculative Execution All Exist for the Same Underlying Reason

What is the shared problem all three try to solve? How does each one attack it differently?

2. Explain Why a Single-Threaded Application Cannot Be Sped Up by Adding More Cores

Walk through what happens (or does not happen) to a single-threaded program when it runs on an 8-core CPU instead of a 2-core CPU.

3. Explain the Full Path of a System Call, From an Application's Perspective to the Kernel and Back

Use the CreateFile() example. What privilege changes happen, and why can't the app just access the disk directly?

After a context switch, why does the new thread often run slower for a short time, beyond just the cost of saving and restoring registers?

5. Explain the Trade-off Intel's P-core/E-core Design and AMD's Uniform-Core Design Are Each Making

What is each design aiming for, and what does each give up to get it?

SCENARIO QUESTIONS (Troubleshooting)

Scenario 1: "My Game Runs at 100% CPU on One Core, But My CPU Has 16 Threads and Overall Usage Shows Only 20%"

What is likely happening? Will a CPU with more cores help this particular game?

Scenario 2: "My Laptop Is Fast for the First 5 Minutes of Video Export, Then Gets Noticeably Slower"

What is likely happening inside? Which idea from this chapter explains it?

Scenario 3: "Task Manager Shows 24 Logical Processors, But I Only Paid for a '12-core' CPU"

Is this a mistake? What is the explanation?

Scenario 4: "A Background App Is Barely Using CPU%, But My System Still Feels Sluggish With Many Apps Open"

Which CPU-level mechanism (beyond raw CPU%) might explain the sluggishness?

Scenario 5: "A Program Immediately Crashes With an Access Violation the Moment It Tries to Read Another Process's Memory"

Which privilege mechanism from this chapter causes this, and why is that a good thing?

INTERVIEW QUESTIONS

Questions a technical interviewer might ask:

1. Explain the difference between instruction-level parallelism and thread-level parallelism.

2. Why is speculative execution both a performance feature and a security concern (refer to Spectre/Meltdown in general terms)?

3. Explain what a cache hit and a cache miss mean, and why the cache miss rate matters for performance.

4. Explain why a context switch is not "free", even on a fast modern CPU.

5. Why does 64-bit computing matter beyond "bigger numbers"? What specific limit of 32-bit systems does it solve?

PRACTICAL TASK

Task: Profile Your Own CPU

Using Task Manager and Resource Monitor (from the Practical Lab), write a short report covering:

  1. CPU identity: Model, physical cores, logical processors, base and boost clock speed
  2. SMT/Hyper-Threading: Is it on? How do you know from the numbers you saw?
  3. A single-threaded workload you found: Which app, and what did its CPU graph look like?
  4. A multi-threaded workload you found: Which app, and how did its CPU use differ from the single-threaded one?
  5. Frequency scaling you observed: What was the idle speed compared with the loaded speed?

Why This Matters

  • You can now read a CPU spec sheet and explain what each number (cores, threads, base clock, boost clock, TDP) really means, not just as a marketing term
  • You can tell whether a performance problem is a single-thread limit, a heat/power issue, or a scheduling/context-switch issue. This is the first real troubleshooting skill built on Chapter 1's hardware base

CHAPTER SUMMARY

What you learned:

  • The CPU's whole job is one loop: Fetch → Decode → Execute → Memory → Writeback, repeated billions of times per second
  • Cores are independent processing units. Hardware threads are logical processors a core shows through SMT/Hyper-Threading. More logical processors does not mean the same extra real power
  • A cache ladder (registers → L1 → L2 → L3 → RAM) exists only to hide the big delay between the CPU and main memory
  • Pipelining, branch prediction, out-of-order execution and speculative execution all squeeze more parallelism out of one instruction stream (instruction-level parallelism)
  • Ring 0 (kernel mode) and Ring 3 (user mode) are privilege levels enforced by the CPU. System calls are the only legitimate bridge between them
  • Interrupts (hardware and software) let the CPU react to events instead of wastefully polling. Context switching is how one core seems to run many programs at once, and it is not free
  • x86/x64 is the instruction set almost all Windows PCs speak. x64 removed the 4 GB memory limit of 32-bit x86 and doubled the register count
  • Intel and AMD make different trade-offs (hybrid P-core/E-core vs. uniform multi-CCD) to balance performance, power and heat
  • Clock speed, dynamic frequency scaling, thermal throttling and TDP together explain most "why is my CPU slow or hot?" questions

Key diagram:

Fetch → Decode → Execute → Memory → Writeback   (the instruction cycle)
        ↑ made faster by pipelining, branch prediction,
          out-of-order execution, speculative execution
        ↑ made possible at scale by multiple cores + SMT
        ↑ kept fed by the cache hierarchy (L1/L2/L3/RAM)
        ↑ kept safe by privilege levels (Ring 0 / Ring 3)
        ↑ kept responsive by interrupts + context switching
  • Extends: Chapter 1 (The Complete Computer Architecture)
  • Required for: Chapter 3 (RAM and Memory Internals, which builds directly on the cache and virtual memory ideas introduced here), Chapter 9/10 (Processes and Threads, which build directly on privilege levels, context switching, and cores/threads)
  • Related concepts: Chapter 4 (Motherboard and Hardware Communication, hardware interrupts in depth), Chapter 8 (Windows Architecture, kernel vs. user mode parts in detail)