Section 2: Buses In Depth

The Big Picture: What Is a Bus?

A bus is a set of wires that carries data between parts of the computer. Think of it as a road. Some roads are wide and fast (a highway), some are narrow and slow (a village lane). The motherboard has many roads, each built for a different job.

Two things decide how good a road is:

Data moved per second = width × speed. That is why a wide, slow bus can match a narrow, fast one.

2.1 The System Bus / Front-Side Bus (FSB)

What it is: In older computers, the front-side bus was the one big road between the CPU and the northbridge chip (Section 1). RAM and graphics traffic went along it too.

The problem: Everyone shared it. The CPU, RAM and graphics all waited their turn on the same road, and it was a parallel bus (many wires side by side), which becomes hard to speed up because the wires interfere with each other.

The fix: Move the traffic off the shared road.

Year   What replaced the FSB                      Who
────   ─────────────────────────────────────      ─────────
2003   HyperTransport (point-to-point links)      AMD
2008   QPI - QuickPath Interconnect               Intel
2017+  Infinity Fabric                            AMD (Ryzen/EPYC)
today  Memory controller is INSIDE the CPU        both

2.2 CPU-to-CPU and CPU-to-chipset links (QPI, Infinity Fabric)

These new links are point-to-point: each link joins exactly two things, like a private phone line, not a party line. Nobody has to wait. On servers with two CPUs, a QPI or Infinity Fabric link lets one CPU read the other CPU's RAM. On desktops, the same idea links the different pieces ("chiplets") inside a Ryzen processor.

2.3 PCIe (PCI Express) — The Main Road for Fast Parts

What it is: PCIe is the standard link for graphics cards, NVMe SSDs, network cards and more. It replaced the older PCI and AGP slots.

Here is a real board with several slot types:

Figure 4.5 — Slots on a real motherboard. From the top: a short slot (x4), a long slot (x16), a very short slot (x1), another x16, and an old white PCI slot at the bottom. Longer slot = more lanes. Photo: snickerdo, CC BY-SA 3.0, via Wikimedia Commons.

Lanes. One PCIe lane is two pairs of wires: one pair to send, one pair to receive. Both work at the same time. A slot can have 1, 4, 8 or 16 lanes. That is what "x1", "x4", "x16" mean.

x1 slot  :  ═  (1 lane)
x4 slot  :  ═══════  (4 lanes)
x16 slot :  ═══════════════════════════════  (16 lanes)

A card also fits in a longer slot than it needs (an x4 card works in an x16 slot). The slot's electrical lanes can be fewer than its physical length, so always read the board manual.

Speed by generation. Each new version doubles the speed per lane:

Both ends agree to use the fastest version and widest width both support. An old card in a new slot works, just at the old speed.

How devices are named. Every PCIe device has an address made of three numbers: Bus : Device : Function (written B:D.F, like 01:00.0). The operating system uses it to find each device. Windows shows it in Device Manager (see the Lab).

Splitting lanes. The CPU has a fixed number of lanes. One x16 graphics slot can sometimes split into two x8 slots (this is called bifurcation). That is how a board gives two graphics cards half the lanes each, or lets a cheap card hold four NVMe SSDs.

2.4 USB Architecture (Hubs and Cascading)

What it is: USB (Universal Serial Bus) is the "plug anything in" connection. Unlike PCIe, one USB controller feeds many devices through hubs.

Figure 4.6 — The back panel (called the I/O panel) of a real motherboard. You can see USB, network (Ethernet), video (VGA, DVI, HDMI), six audio jacks and two old round PS/2 sockets for keyboard and mouse. Photo: Hitachi-Train, public domain, via Wikimedia Commons.

Who is in charge? The host controller (inside the PCH or CPU) is the boss. A USB device never speaks first. The host asks each device in turn: "Do you have anything for me?" (this is called polling).

The tree. Devices connect in a tree shape through hubs:

        Host controller (in the PCH)
                  │
             Root hub
         ┌────────┼────────┐
      Mouse    Hub A      Keyboard
             ┌───┴────┐
         Flash drive  Hub B
                     ┌─┴──┐
                  Webcam  Printer

Speeds:

(Divide Gbit/s by 8 to get GB/s. So 5 Gbit/s is about 0.6 GB/s.)

Practical tip: All devices behind one hub share that hub's speed. Plug your fast external SSD into a port of its own, not into a crowded hub.

2.5 SATA and SAS Controllers

What it is: SATA and SAS are the buses for storage drives (hard drives and 2.5-inch SSDs).

SATA (Serial ATA):

• One drive per port, with a thin cable. (Older IDE ribbon cables shared one cable between two drives.)
• Controller lives in the PCH. It follows a standard called AHCI that the operating system understands.

SAS (Serial Attached SCSI) is the "business" version used in servers. It has two paths to each drive (so a drive keeps working if one cable fails) and supports many more drives through expanders. A SAS controller can also run SATA drives; the reverse does not work.

NVMe is different. An NVMe SSD does not use SATA at all. It plugs into an M.2 slot and talks over PCIe lanes (usually x4). That is why NVMe SSDs are 5 to 20 times faster than SATA SSDs.

SATA SSD:   CPU ── PCH ── SATA cable ── SSD          (about 550 MB/s)
NVMe SSD:   CPU ───────── PCIe x4 ───── SSD          (about 3,500 – 14,000 MB/s)

2.6 I²C and SMBus (The "Whisper" Buses)

What it is: Not every message is big. Sensors, fan controllers and tiny chips only need to say things like "temperature is 52 °C". They use a very simple two-wire bus:

Every device on the bus has its own address. The master chip calls an address; only that device answers. SMBus is a slightly stricter version of I²C used on PCs.

Where you meet it:

• RAM sticks carry a tiny memory chip called SPD. At boot the board reads it over SMBus to learn the RAM's size and speed. (Chapter 3 mentioned this.)
• Temperature and fan chips.
• Battery and power chips on laptops.
• Lighting (RGB) controllers.

Summary